Fedyunin Roman Nikolaevich, Candidate of engineering sciences, associate professor, sub-department of computer engineering, Penza State University (40 Krasnaya street, Penza, Russia), email@example.com
Background. The research object is hardware and software models of FPGAbased computing devices. The research subject is the methodology of time analysis of hardware-software modules of computing devices and synthesis thereof on the FPGA basis. The aim of the work is to develop a method of rapid time study of FPGA-based computing system modules.
Materials and methods. The methodology represented in the article unites mathematical and simulation methods of time estimates of algorithms, realized within hardware-software modules. The simulation method shows pictorial functioning of the module and allows to collect a library of modules for further complex analysisof the computing device. The mathematical method is convenient as it requires no knowledge of specialized software and allows to roughly calculate an individual device module.
Results. The author developed two computer models of five computing devices. The first computer model is built on the basis of the CPNTools CAD and the Petri nets mathematical apparatus. The second model – using the VHDL language and the ALTERA CAD. Both approaches proved adequacy of the developed methodology of time estimates.
Conclusions. Despite a presence of systems of program modules for time calculation and visualization in VLSI realization means, the methodology described inthe article allows to rapidly estimate computing device development time adequacy and to introduce required amendments at early stages of architecture formation.
timing analysis, computing device, computing system, arithmetic logic unit, methods of analysis, hardware and software module, functional block
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